The present invention relates to computer memory systems, and more specifically, to the handling of repaired memory array elements in a memory of a computer memory system.
Memory plays an important role in computer server systems, and maintaining error free operation is often a key differentiation between suppliers of industry standard dual in-line memory module (DIMM) memory. Silicon defects can occur on semiconductors, including memory chips such as dynamic random access memory (DRAM) devices. Memory chips are typically designed to include redundant elements such that a defective memory array element can be replaced by a spare, or redundant, element. Faulty memory array elements can be identified during manufacturing test and also during field operation (e.g., at customer locations), and they can be repaired (fused) during both the DRAM manufacturing process and field operation.
A defect causing a failure may weaken other cells in the memory. In one example, if an identified defect is in the memory array, this may lead to weaker cells on physically adjacent rows or columns in the memory array. In another example, if the defect is in a decoder or other peripheral circuitry, then repairing array elements will not reduce risk of failure, nor improve errors reported for some array addresse. Weakened memory cells are often not detectable during manufacturing tests, however some of them they may degrade with time and fail during field operation.